Motonesemu is a simplified NES emulator. This project is started for the purpose of studying CPU architecture, not playing NES. Since the main purpose is "studying", usability or functionality are not its main requirements. It mainly aims at revieling the CPU internals. It implements CPU, PPU, RAM, ROM, DMA, and joy controler. Sounds or other minor features are not supported. The number of source files is less than 50. The source code is the text book. Readers can easily study and understand the CPU internal and NES architecture, emuration technology, pins, clocks, bus, interrupts, registers etc. Motonesemu also has a CPU and PPU debugger. This debugger is indispensable when you implement CPU on the hardware such as FPGA or ASIC. https://ja.osdn.net/projects/motonesfpga/ is the NES implementation on FPGA. After studying CPU emuration with Motonesemu, you can also implement it on the real hardware. Also, MOS 6502 assembler is developed in the other repository in SourceForge. http://sourceforge.jp/users/astoria-d/pf/motonesas/scm/ '''Demo:''' https://youtu.be/4Cxi036I5Hs ------------ If you are going to develop your own CPU, you will need; - emulator, debuger - assembler - reprogrammable logic gate (FPGA) For those CPU adventurer, hope these project and texts (source code) can be a good navigation. Start designing your own CPU. Enjoy! -- astoria-d
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